Experience

Below is a summary of my research, teaching, and work experience that spans academia and industry.

  • Present Sept. 2018

    Graduate Research Assistant — University of Michigan — Ann Arbor, MI

    Group: RTCL Laboratory — Advisor: Kang G. Shin
    Description: My research aims to develop novel cyber attacks on the memory, microarictecural, and operating systems levels, in order to better understand potential vulnerabilities and motivate the development of more secure defenses. My research aims to ensure the integrity of integrated circuit hardware throughout the design and deployment lifecycles to facilitate a secure foundation for autonomous cyber-physical systems.

    • Developed SpecHammer, a novel attack combining speculative execution (Spectre) and memory (Rowhammer) vulnerabilities to relax a key restriction in prior speculative execution attacks.
    • Led work on the GadgetHammer attack, which demonstrated that attacks targetting memory (Rowhammer) can exploit data in general code patterns, as opposed to specific sensitive memory values, broadening the scope of memory attacks.
    • Reverse engineered physical to DRAM address mapping to facilitate bit-flipping attacks on newer generation machines
    • Devised novel memory massaging technique to exploit operating system's physical page allocator
    • Utilized timing and memory side-channel techniques to extract information that aided in end-to-end atacks on victim memory and operating systems
  • Dec. 2022 Aug. 2022

    Graduate Student Instructor — Univeirsity of Michigan, Ann Arbor — Ann Arbor, MI

    Class: Principles of Real-Time Embedded System (EECS 571) — Supervisor: Prof. Kang G. Shin
    Description: Taught students about real-time scheduling algorithms and operating systems and oversaw student projects.

  • Aug. 2022 June 2018

    Graduate Research Intern — MIT Lincoln Laboratory — Lexington, MA

    Team: Cyber-Physical Systems — Supervisors: Kyle Ingols and Kevin Bush
    Description: Reverse engineered physical-to-DRAM address mapping on latest Intel processors to achieve first bit-flips on newer generation machines.

  • May 2021 Sept. 2015

    Graduate Research Assistant — University of Michigan — Ann Arbor, MI

    RTCL Laboratory — Advisor: Kang G. Shin
    My research aims to ensure the integrity of integrated circuit hardware throughout the design and deployment lifecycles to facilitate a secure foundation for autonomous cyber-physical systems.

  • Aug. 2018 June 2018

    Research Intern — Tokyo Institute of Technology — Tokyo, Japan

    Team: Hara Lab — Supervisors: Yuko Hara
    Description: Researched single instruction computing, implemented single instruction architecture in Verilog, and modified existing designs to reduce energy cost by 50% and area cost by 75%.

  • Nov. 2017 Feb. 2016

    Undergraduate Researcher — University of Texas at Austin — Austin, TX

    Department: Electrical & Computer Engineering — Supervisor: Prof. Andreas Gerstlauer
    Description: Wrote Python scripts for automating benchmark annotation process, modified machine learning code to approximate computations and reduce power cost.

  • Aug. 2017 June 2017

    Intern — NASA Goddard Space Flight Center — Greenbelt, MD

    Team: Satelite Servicing Projects Division (now NExIS) — Supervisors: Joe Gibson
    Description: Contributed to the RESTORE-L (now OSAM-1) mission ICAS, by developing debugging tools for gathering Xilinx microblaxe processor performance, writing C drivers and VHDL code.

  • Aug. 2016 June 2016

    Research Intern — Tohoku University — Sendai, Japan

    Team: Otsuji Lab — Supervisors: Taiichi Otsuji
    Description: Researched terahertz emission and detection in graphene based devices.

  • Jul. 2015 June 2015

    Intern — Elsewedy Electric — Cairo, Egypt

    Team: Wire, Cable & Accessories — Supervisors: Mohamed Nour
    Description: Studies assembly procedures and manufacturing processes of electricity cables.